SanDisk Corporation (SanDisk) will start mass-production of new high performance 4-bits-per-cell (X4) flash memory. Using 43-nanometer (nm) process technology, this memory allows 64-gigabit (Gb) memory in a single die. The company has also produced an advanced X4 controller that is needed to effectively manage the complexities and performance requirements of X4 memory.
The X4 memory chip combines with the X4 controller chip in a multi-chip package (MCP) to offer a complete, integrated and low-cost storage solution.
“The development of X4 memory and controller technologies is a major milestone for flash memory storage that will provide significant long term benefits to SanDisk and play a critical role in future NAND flash scaling,” said Khandker Quader, senior vice president, memory technology & product development, SanDisk. “64Gb X4 is the result of numerous key innovations, and demonstrates SanDisk’s leadership in driving multi-bit flash memory with performance and cost suitable for storage-intensive applications such as music, movies, photos, GPS, games and more.”
X4 Flash Memory:
The company co-developed the 64Gb X4 flash memory chip on 43nm technology with Toshiba Corporation (Toshiba), which cooperates with the company in the development and manufacturing of advanced flash memory. The new 43nm 64Gb X4 chip is the highest capacity and highest density flash memory die in the world to enter production in 2009, boasting a 7.8MB/sec memory write performance that is comparable with current multi-level cell technologies. the company’s new All-Bit-Line (ABL) architecture as well as the newly introduced three-step programming (TSP) and sequential sense concept (SSC) serve as key enablers to X4’s impressive performance.
X4 Controller Technology Is Key:
The company developed a number of innovative solutions for advanced system management that address the difficulties posed by this complex 4-bits-per-cell technology. The X4 controller, developed and owned by the company, utilizes a first-of-its-kind error correcting code (ECC) scheme specifically developed for use in storage systems, and tailored to support the 16 levels of distribution needed for 4-bits-per-cell.
“The inherent challenges in producing 4-bits-per-cell technology with good performance and low costs require advanced system level innovations in multi-level storage,” said Menahem Lasser, vice president, future technologies and innovation, SanDisk. “Our X4 controller technology with its memory management and signal processing schemes is crucial to meeting the unique demands of 4-bits-per-cell memory, and demonstrates SanDisk’s ability to conceptualize and produce sophisticated flash memory solutions.”
On February 11, 2009, at the 2009 International Solid State Circuits Conference (ISSCC), the company and Toshiba presented a technical paper describing the key technology advancements that led to the development of 64Gb 4-bits-per-cell NAND flash memory on 43nm technology node. This announcement comes one year after the company unveiled its X3 (3-bits-per-cell NAND) technology at the 2008 ISSCC and was subsequently honored with the ISSCC 2009 Lewis Winner Outstanding Paper Award.