The SpyGlass-MBIST solution is the RTL memory BIST insertion tool to be independent of BIST IP technology, and works with any supplier’s qualified ASIC design kit and BIST libraries. The solution allows replacement of the original memories in a design with the BIST system at RTL as well as insertion of the repair solution, if required. The technology also facilitates replacement or insertion of BIST inserted blocks at the SoC level, along with top level connection of the signals.
The integration of Atrenta’s SpyGlass-MBIST solution in our front-end design kit has automated ST’s proprietary embedded memory test and repair capabilities at RTL. The solution not only allows early and faster validation at RTL, but also allows timing optimization of the complete RTL with memory BIST where area impact is known early, said Frederic Grandvaux, Memory Test Solutions manager within Central CAD & Design Solutions, STMicroelectronics.
The SpyGlass-MBIST flow allows the user to define design-specific information or change the tool’s default values. The MBIST insertion can be run at both the gate and the RTL levels. The other benefit of BIST insertion at the RTL level is that SpyGlass-DFT rules can be run at RTL including the MBIST logic for achieving high (>99%) testability early in the design stage.
We have three designs in advanced phase of development that rely on inserting memory test with the SpyGlass-MBIST solution. This automatic solution becomes necessary in devices having huge proliferation of memory instances, as our applications require improving efficiency/lead time in our DFT design flow, said Angelo Oldani, design director for the Communication Infrastructure Division, STMicroelectronics.
We are delighted to be working with STMicroelectronics to extend our capabilities in the area of memory test and repair, said Kiran Vittal, product marketing director for test and power products at Atrenta. The SpyGlass-MBIST technology is a significant enhancement to our existing family of test products – SpyGlass-DFT for RTL stuck-at test analysis, and SpyGlass-DFT DSM for RTL at-speed test analysis. With this technology, we are proud to offer the broadest solution in the industry to support Early Design Closure for inserting and validating design-for-test at RTL.
The SpyGlass-MBIST product is available now, and the US list price starts at $90,000 for a one-year time based license.
STMicroelectronics is a Switzerland-based supplier of silicon chips.
Atrenta is a US-based provider of Early Design Closures solutions.
