“CSR is moving to the most advanced process nodes at a very rapid pace, so we’re employing sophisticated DFM practices to ensure our designs are more robust over the process window, and to eliminate manufacturing surprises late in the development cycle,” said Chris Ladas, an executive director of parent company CSR plc and senior vice president of operations at CSR. “We’re extremely pleased with the results we achieved on our most recent RFCMOS 65nm design, which employed a full range of DFM methods including Calibre tools.”

CSR is adopting the complete Calibre DFM solution, which includes litho process checking with the Calibre LFD tool, critical area analysis (CAA) with Calibre YieldAnalyzer, CMP analysis and intelligent metal fill with Calibre CMPAnalyzer and Calibre YieldEnhancer, and critical feature analysis (CFA) using Calibre nm DRC with Equation-based DRC. All of these products are supported by design kits from TSMC, CSR’s foundry of choice. By using these tools to identify areas of the physical design that are sensitive to manufacturing process variations, and then making changes to remove these sensitivities, CSR is able to improve the robustness of their designs across the process window. A more robust design helps ensure first time working silicon, minimizes the potential for manufacturing surprises, and enables a faster ramp to volume production.

“We worked extensively with Mentor to define a collaborative roadmap for the introduction of a DFM methodology and support tooling to meet CSR’s specific objectives,” said Mark Redford, vice president of Advanced Process Technology Development at CSR. “This is a strategic initiative for us because we see DFM as a competitive advantage. It’s a way for us to get more advanced, higher performance products to market more quickly and with no manufacturing hitches late in the product development cycle. To do this effectively, you need a DFM-aware design flow that integrates accurate information about the target manufacturing process.”

“Consistent with the TSMC DFM Compliance Initiative, the Calibre DFM platform provides an efficient way to incorporate the valuable TSMC data into a customer’s physical design flow which is an integral part of our Open Innovation PlatformTM, helping designers to innovate and achieve silicon success,” said S.T. Juang, senior director of Design Infrastructure Marketing at TSMC. “TSMC is confident that our DFM compliant program, supported by EDA tools, will continue to show increasing value to key fabless partners like CSR.”

“We’ve worked closely with CSR and TSMC to realize our mutual vision of how engineers can use DFM to design and manufacture more competitive IC products,” said Joseph Sawicki, vice president and general manager for the Design-to-Silicon division at Mentor Graphics. “We are pleased with the first time working Silicon obtained by CSR at the 65nm process node. It is a clear demonstration of the value proposition of the Calibre DFM platform.”

Mentor Graphics Corporation is a US-based supplier of electronic design automation systems.